Avago Technologies LSI8751D - Manual (Page 276)

7-40 Instruction Set of the I/O Processor
Figure 7.25 Read Cycle, Slow Memory (
≥
64 Kbyte)
MAD
(Address driven by LSI53C875
Data driven by memory)
MAS2/
(Driven by LSI53C875)
MAS1/
(Driven by LSI53C875)
MAS0/
(Driven by LSI53C875)
MCE/
(Driven by LSI53C875)
MOE/
(Driven by LSI53C875)
CLK
Middle
1 2 3 4 5 6 7 8 9
MWE/
(Driven by LSI53C875)
10
High Order Address
Address
Low order
Address
t
12
t
11
t
13
t
15s
t
14s
t
16s