Avago Technologies LSI8751D - Manual (Page 270)

7-34 Instruction Set of the I/O Processor
Figure 7.22 Write Cycle, Normal/Fast Memory (
≥
64 Kbytes), Single Byte Access
CLK
MAD
(Driven by LSI53C875)
MAS2/
(Driven by LSI53C875)
MAS1/
(Driven by LSI53C875)
MCE/
(Driven by LSI53C875)
MOE/
(Driven by LSI53C875)
MWE/
(Driven by LSI53C875)
1 2 3 4 5 6 7 8 9
High Order
Address
Middle Order
Address
Low Order
Address
MAS0/
(Driven by LSI53C875)
t
11
t
12
t
13
t
24
Valid
Write Data
t
25
t
20
t
23