Avago Technologies LSI8751D - Manual (Page 284)

7-48 Instruction Set of the I/O Processor
Figure 7.30 Write Cycle, Slow Memory (
≤
64 Kbyte)
MAD
MAS2/
(Driven by LSI53C875)
MAS1/
(Driven by LSI53C875)
MAS0/
(Driven by LSI53C875)
MCE/
(Driven by LSI53C875)
MOE/
(Driven by LSI53C875)
CLK
1 2 3 4 5 6 7 8 9
MWE/
(Driven by LSI53C875)
High Order Low order
Address
t
12
t
11
Address
t
13
t
24s
t
25
(Driven by LSI53C875)
Valid Write
Data
t
20
t
23