Scsi control one (scntl1), Scsi control, One (scntl1) – Avago Technologies LSI8751D User Manual
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SCSI Operating Registers
TRG
Target Mode
0
This bit determines the default operating mode of the
LSI53C875. The user must manually set the target or
initiator mode. This is done using the SCRIPTS language
(
SET TARTET
or
CLEAR TARGET
). When this bit is set, the
chip is a target device by default. When this bit is cleared,
the LSI53C875 is an initiator device by default.
Note:
Writing this bit while not connected may cause the loss of
a selection or reselection due to the changing of target or
initiator modes.
Register: 0x01 (0x81)
SCSI Control One (SCNTL1)
Read/Write
EXC
Extra Clock Cycle of Data Setup
7
When this bit is set, an extra clock period of data setup
is added to each SCSI send data transfer. The extra data
setup time can provide additional system design margin,
though it affects the SCSI transfer rates. Clearing this bit
disables the extra clock cycle of data setup time. Setting
this bit only affects SCSI send operations.
ADB
Assert SCSI Data Bus
6
When this bit is set, the LSI53C875 drives the contents
of the
onto the SCSI
data bus. When the LSI53C875 is an initiator, the SCSI
I/O signal must be inactive to assert the
contents onto the SCSI bus. When
the LSI53C875 is a target, the SCSI I/O signal must be
active to assert the SODL contents onto the SCSI bus.
The contents of the
register can be asserted at any time, even before the
LSI53C875 is connected to the SCSI bus. Clear this bit
when executing SCSI SCRIPTS. It is normally used only
for diagnostics testing or operation in low level mode.
7
6
5
4
3
2
1
0
EXC
ADB
DHP
CON
RST
AESP
IARB
SST
0
0
0
0
0
0
0
0