Avago Technologies LSI8751D User Manual
Page 126
5-10
SCSI Operating Registers
odd byte boundary, the LSI53C875 stores the last byte in
the
register during a
receive operation, or in the
register during a send operation. This byte is
combined with the first byte from the subsequent transfer
so that a wide transfer is completed.
For more information, see
Section 2.5.14, “Chained Block
in
Chapter 2, “Functional Description.”
SLPMD
SLPAR Mode Bit
5
If this bit is cleared, the
SCSI Longitudinal Parity (SLPAR)
register functions like the LSI53C825. If this bit is set, the
SCSI Longitudinal Parity (SLPAR)
register reflects the
high or low byte of the SLPAR word, depending on the
state of
bit 4. It also allows
a seed value to be written to the
register.
SLPHBEN
SLPAR High Byte Enable
4
If this bit is cleared, the low byte of the SLPAR word is
present in the
SCSI Longitudinal Parity (SLPAR)
register.
If this bit is set, the high byte of the SLPAR word is
present in the
SCSI Longitudinal Parity (SLPAR)
register.
WSS
Wide SCSI Send
3
When read, this bit returns the value of the Wide SCSI
Send (WSS) flag. Asserting this bit clears the WSS flag.
This clearing function is self-clearing.
When the WSS flag is high following a wide SCSI send
operation, the SCSI core is holding a byte of “chain” data
in the
register. This data
becomes the first low-order byte sent when married with
a high-order byte during a subsequent data send transfer.
Performing a SCSI receive operation clears this bit. Also,
performing any nonwide transfer clears this bit.
VUE0
Vendor Unique Enhancements Bit 0
2
This bit is a read only value indicating whether the group
code field in the SCSI instruction is standard or vendor
unique. If cleared, the bit indicates standard group codes;
if set, the bit indicates vendor unique group codes. The
value in this bit is reloaded at the beginning of all
asynchronous target receives. The default for this bit is
reset.