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Dma command (dcmd), Next address (dnad), Dma next – Avago Technologies LSI8751D User Manual

Page 161: Address (dnad), Dma next address (dnad)

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5-45

Register: 0x27 (0xA7)

DMA Command (DCMD)
Read/Write

DCMD

DMA Command

[7:0]

This 8-bit register determines the instruction for the
LSI53C875 to execute. This register has a different
format for each instruction. For complete descriptions,
see

Chapter 6, “Instruction Set of the I/O Processor.”

Registers: 0x28–0x2B (0xA8–0xAB)

DMA Next Address (DNAD)
Read/Write

DNAD

DMA Next Address

[31:0]

This 32-bit register contains the general purpose address
pointer. At the start of some SCRIPTS operations, its
value is copied from the DSPS register. Its value may not
be valid except in certain abort conditions. The default
value of this register is zero.

Do not use this register to determine data addresses
during a Phase Mismatch interrupt, as its value is not
always correct for this use. Use the

DMA Byte Counter

(DBC)

,

DMA FIFO (DFIFO)

, and

DMA SCRIPTS Pointer

Save (DSPS)

registers to calculate residual byte counts

and addresses as described in

Section 2.5.8.1, “Data

Paths,”

in

Chapter 2, “Functional Description.”

7

0

DCMD

x

x

x

x

x

x

x

x

31

0

DNAD

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

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