Avago Technologies LSI8751D - Manual (Page 217)

Read/Write Instructions 6-21
The Set/Clear SCSI ACK/ATN instruction is used after
message phase Block Move operations to give the
Initiator the opportunity to assert attention before
acknowledging the last message byte. For example, if the
initiator wishes to reject a message, is issues an Assert
SCSI ATN instruction before a Clear SCSI ACK
instruction.
R Reserved [2:0]
6.3.2 Second Dword
SA Start Address [31:0]
This 32-bit field contains the memory address to fetch the
next instruction if the selection or reselection fails.
If relative or table relative addressing is used, this value
is a 24-bit signed offset relative to the current
DMA
SCRIPTS Pointer (DSP) register value.
6.4 Read/Write Instructions
The Read/Write instruction supports addition, subtraction, and
comparison of two separate values within the chip. It performs the
desired operation on the specified register and the
SCSI First Byte
Received (SFBR) register, then stores the result back to the specified
register or the SFBR.
6.4.1 First Dword
IT[1:0] Instruction Type - Read/Write Instruction [31:30]
The Read/Write instruction uses operator bits 26 through
24 in conjunction with the opcode bits to determine which
instruction is currently selected.
OPC[2:0] Opcode [29:27]
The combinations of these bits determine if the
instruction is a Read/Write or an I/O instruction. Opcodes
000 through 100 are considered I/O instructions.