Avago Technologies LSI8751D - Manual (Page 113)

4-21
Table 4.11 describes the External Memory Interface Signals group.
Table 4.11 External Memory Interface Signals
Name
Pin No.
LSI53C875,
LSI53C875J,
LSI53C875N,
LSI53C875JB
Typ
e
Description
MAS0/ 137/179/A8 O Memory Address Strobe 0. This pin is used to latch in the least
significant address byte of an external EPROM or Flash memory.
Since the LSI53C875 moves addresses eight bits at a time, this
pin connects to the clock of an external bank of flip-flops which
are used to assemble up to a 20-bit address for the external
memory.
MAS1/ 136/178/B8 O Memory Address Strobe 1. This pin is used to latch in the
address byte corresponding to address bits [15:8] of an external
EPROM or Flash memory. Since the LSI53C875A moves
addresses eight bits at a time, this pin connects to the clock of
an external bank of flip-flops which assemble up to a 20-bit
address for the external memory.
MAD[7:0] LSI53C875,
LSI53C875E,
LSI53C875J,
LSI53C875JE:
59, 60, 61, 62,
64, 65, 66, 67
59, 60, 61, 62,
64, 65, 66, 67
LSI53C875N:
78, 79, 80, 81,
83, 84, 85, 86
LSI53C875JB,
LSI53C875JB
E: L7, M7, N7,
K7, M8, N8,
L8, K8
I/O Memory Address/Data Bus. This bus is used in conjunction with
the memory address strobe pins and external address latches to
assemble up to a 20-bit address for an external EPROM or Flash
memory. This bus will put out the most significant byte first and
finish with the least significant bits. It is also used to write data to
a Flash memory or read data into the chip from external
EPROM/Flash memory.
See
Section 4.1, “MAD Bus Programming,” for more details.
MWE/ 139/181/C7 O Memory Write Enable. This pin is used as a write enable signal
to an external Flash memory.
MOE/ 140/182/B7 O Memory Output Enable. This pin is used as an output enable
signal to an external EPROM or Flash memory during read
operations.
MCE/ 141/183/A7 O Memory Chip Enable. This pin is used as a chip enable signal
to an external EPROM or Flash memory device.