Avago Technologies LSI8751D - Manual (Page 254)

7-18 Instruction Set of the I/O Processor
Figure 7.12 Operating Register/SCRIPTS RAM Write
Byte Enable
Addr In
CMD
t
2
t
1
t
2
t
1
t
2
t
1
t
1
t
2
t
2
t
3
t
2
t
1
t
3
CLK
(Driven by System)
FRAME/
(Driven by Master)
AD/
(Driven by Master)
C_BE/
(Driven by Master)
PAR/
(Driven by Master)
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C875)
STOP/
(Driven by LSI53C875)
DEVSEL/
(Driven by LSI53C875)
t
2
Data In
t
1
t
2
t
1
t
3