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Index ix-5 – Avago Technologies LSI8751D User Manual

Page 309

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Index

IX-5

byte offset counter

5-39

,

5-43

cache line size enable

5-51

chained mode

5-9

chip revision level

5-37

chip type

5-62

clear DMA FIFO

5-37

clear SCSI FIFO

5-76

clock address incrementor

5-42

clock byte counter

5-42

clock conversion factor

5-13

configured as I/O

5-36

configured as memory

5-36

connected

5-7

,

5-33

data acknowledge status

5-37

data request status

5-37

data transfer direction

5-35

dataRD

5-62

dataWR

5-62

destination I/O memory enable

5-48

disable halt on parity error or ATN

5-7

disable single initiator response

5-76

DMA direction

5-42

DMA FIFO

5-43

DMA FIFO empty

5-23

DMA FIFO size

5-42

DMA interrupt pending

5-34

enable parity checking

5-5

enable read line

5-49

enable read multiple

5-49

enable response to reselection

5-14

enable response to selection

5-14

enable wide SCSI

5-12

encoded chip SCSI ID, bits [3:0]

5-14

encoded destination SCSI ID

5-18

,

5-22

extend SREQ/SACK filtering

5-74

extra clock cycle of data setup

5-6

fetch enable

5-63

fetch pin mode

5-38

FIFO byte control

5-41

FIFO flags

5-27

,

5-30

flush DMA FIFO

5-37

function complete

5-54

,

5-57

general purpose timer expired

5-56

,

5-59

general purpose timer period

5-68

general purpose timer scale factor

5-66

GPIO enable

5-63

GPIO[4:0]

5-19

halt SCSI clock

5-76

handshake-to-handshake timer bus activity enable

5-66

handshake-to-handshake timer expired

5-56

,

5-59

handshake-to-handshake timer period

5-64

high impedance mode

5-40

illegal instruction detected

5-24

,

5-50

immediate arbitration

5-8

interrupt-on-the-fly

5-33

IRQ disable

5-52

IRQ mode

5-52

last disconnect

5-30

latched SCSI parity

5-28

latched SCSI parity for SD[15:8]

5-30

lost arbitration

5-27

LSI53C700 family compatibility

5-53

manual start mode

5-49

master control for set or reset pulses

5-42

master data parity error

5-24

,

5-50

master enable

5-63

master parity error enable

5-41

max SCSI synchronous offset

5-17

parity error

5-58

phase mismatch

5-57

pointer SCRIPTS

5-62

prefetch enable

5-51

prefetch flush

5-51

reselected

5-54

,

5-57

reset SCSI offset

5-73

SACK/ status

5-22

SATN/ status

5-22

SBSY/ status

5-22

SC_D/ status

5-23

SCLK

5-72

SCLK doubler enable bit

5-72

SCLK doubler select bit

5-72

scratchA/B operation

5-36

SCRIPTS

5-62

SCRIPTS interrupt instruction received

5-24

,

5-50

SCSI C_D/ signal

5-28

SCSI control enable

5-73

SCSI data high impedance

5-40

SCSI differential mode

5-73

SCSI disconnect unexpected

5-9

SCSI FIFO test read

5-75

SCSI FIFO test write

5-77

SCSI gross error

5-54

,

5-57

SCSI high impedance mode

5-74

SCSI I_O/ signal

5-28

SCSI interrupt pending

5-33

SCSI isolation mode

5-72

SCSI loopback mode

5-74

SCSI low level mode

5-74

SCSI MSG/ signal

5-28

SCSI parity error

5-55

SCSI phase mismatch - initiator mode

5-54

SCSI reset condition

5-55

SCSI RST/ received

5-58

SCSI RST/ signal

5-27

SCSI SDP0/ parity signal

5-27

SCSI SDP1 signal

5-30

SCSI selected as ID

5-70

SCSI synchronous offset maximum

5-71

SCSI synchronous offset zero

5-71

SCSI synchronous transfer period

5-15

SCSI true end of process

5-36

SCSI valid

5-22

select with SATN/ on a start sequence

5-4

selected

5-54

,

5-57

selection or reselection time-out

5-56

,

5-59

selection response logic test

5-71

selection time-out

5-65

semaphore

5-32

shadow register test mode

5-40

SI_O/ status

5-23

SIDL least significant byte full

5-26

SIDL most significant byte full

5-29

signal process

5-32

,

5-36

single step interrupt

5-24

,

5-50

single step mode

5-51

SLPAR high byte enable

5-10

SLPAR mode

5-10

SMSG/ status

5-23

SODL least significant byte full

5-26

SODL most significant byte full

5-29

SODR least significant byte full

5-26

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