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Figure6.5 transfer control instructions, Transfer control instructions, Figure 6.5 – Avago Technologies LSI8751D User Manual

Page 224

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6-28

Instruction Set of the I/O Processor

Figure 6.5

Transfer Control Instructions

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8

7

6

5

4

3

2

1

0

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8

7

6

5

4

3

2

1

0

DSPS Register

DCMD Register

DBC Register

Wait for Valid Phase

Compare Phase

Compare Data

Jump if: True=1, False=0

Interrupt on the Fly

Carry Test

0 (Reserved)

Relative Addressing Mode

I/O

C/D

MSG

Opcode Bit 0

Opcode Bit 1

Opcode Bit 2

1 - Instruction Type - Transfer Control

0 - Instruction Type - Transfer Control

Mask for Compare

Data to be compared
with the SCSI First
Byte Received

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