Avago Technologies LSI8751D - Manual (Page 247)

AC Characteristics 7-11
Figure 7.6 Clock Waveforms
Table 7.16 Clock Timing
Symbol Parameter Min Max Unit
t
1
Bus clock cycle time 30 DC ns
SCSI clock cycle time (SCLK)
1
1. This parameter must be met to ensure SCSI timings are within specification.
12.5 60 ns
t
2
CLK LOW time
2
2. Duty cycle not to exceed 60/40.
12 – ns
SCLK LOW time
2
5 – ns
t
3
CLK HIGH time
2
12 – ns
SCLK HIGH time
2
5 – ns
t
4
CLK slew rate 1 – V/ns
SCLK slew rate 1 – V/ns
CLK, SCLK
t
1
t
3
t
4
t
2