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Section 2.5.13.4, “masking – Avago Technologies LSI8751D User Manual

Page 55

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PCI Cache Mode

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behavior when the SATN/ interrupt is enabled during Target mode
operation. The Interrupt-on-the-Fly interrupt is also nonfatal, since
SCRIPTS can continue when it occurs.

The reason for nonfatal interrupts is to prevent SCRIPTS from stopping
when an interrupt occurs that does not require service from the CPU.
This prevents an interrupt when arbitration is complete (CMP set), when
the LSI53C875 has been selected or reselected (SEL or RSL set), when
the initiator asserts ATN (target mode: SATN/ active), or when the
General Purpose or Handshake-to-Handshake timers expire. These
interrupts are not needed for events that occur during high-level
SCRIPTS operation.

2.5.13.4 Masking

Masking an interrupt means disabling or ignoring that interrupt. Interrupts
can be masked by clearing bits in the

SCSI Interrupt Enable Zero

(SIEN0)

and

SCSI Interrupt Enable One (SIEN1)

(for SCSI interrupts)

registers or

DMA Interrupt Enable (DIEN)

(for DMA interrupts) register.

How the chip responds to masked interrupts depends on: whether polling
or hardware interrupts are being used; whether the interrupt is fatal or
nonfatal; and whether the chip is operating in Initiator or Target mode.

If a nonfatal interrupt is masked and that condition occurs, the SCRIPTS
do not stop, the appropriate bit in the

SCSI Interrupt Status Zero (SIST0)

or

SCSI Interrupt Status One (SIST1)

is still set, the SIP bit in the

Interrupt Status (ISTAT)

is not set, and the IRQ/ pin is not asserted. See

Section 2.5.13.3, “Fatal vs. Nonfatal Interrupts,”

for a list of the nonfatal

interrupts.

If a fatal interrupt is masked and that condition occurs, then the
SCRIPTS still stop, the appropriate bit in the

DMA Status (DSTAT)

,

SCSI

Interrupt Status Zero (SIST0)

, or

SCSI Interrupt Status One (SIST1)

register is set, and the SIP or DIP bits in the

Interrupt Status (ISTAT)

is

set, but the IRQ/ pin is not asserted.

When the chip is initialized, enable all fatal interrupts if you are using
hardware interrupts. If a fatal interrupt is disabled and that interrupt
condition occurs, SCRIPTS halts and the system will never know it
unless it times out and checks the ISTAT after a certain period of
inactivity.

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