Avago Technologies LSI8751D User Manual
Page 226
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Instruction Set of the I/O Processor
True/False bit fields. If the comparisons are true, and the
Interrupt-on-the-Fly bit is set (bit 2), the LSI53C875
asserts the Interrupt-on-the-Fly bit.
SCSIP[2:0]
SCSI Phase
[26:24]
This 3-bit field corresponds to the three SCSI bus phase
signals that are compared with the phase lines latched
when SREQ/ is asserted. Comparisons can be performed
to determine the SCSI phase actually being driven on the
SCSI bus. The following table describes the possible
combinations and their corresponding SCSI phase.
These bits are only valid when the LSI53C875 is
operating in Initiator mode. Clear these bits when the
LSI53C875 is operating in the Target mode.
RA
Relative Addressing Mode
23
When this bit is set, the 24-bit signed value in the
register is used as a
relative offset from the current
address (which is pointing to the next instruction,
not the one currently executing). The relative mode does
not apply to Return and Interrupt SCRIPTS.
Jump/Call an Absolute Address
Start execution at the new absolute address.
Jump/Call a Relative Address
Start execution at the current address plus (or minus) the
relative offset.
MSG
C/D
I/O
SCSI Phase
0
0
0
Data-Out
0
0
1
Data-In
0
1
0
Command
0
1
1
Status
1
0
0
Reserved-Out
1
0
1
Reserved-In
1
1
0
Message-Out
1
1
1
Message-In
Command
Condition Codes
Absolute Alternate Address