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E-bit-reset – Enterasys Networks X-Pedition XSR CLI User Manual

Page 71

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T1/E1 & T3/E3 Commands

XSR CLI Reference Guide 2-65

Mode

Controller configuration:

XSR(config-controller xx)#

Default

T3: 44,210 kbps (full‐rate)

E3: 34,099.5 kbps (full‐rate)

Example

The following example configures the T3 controller in slot 1, card with line source clocking, M13 
framing, in unchannelized mode, with a cable length of 250, DSU interoperability mode set to a 
Kentrox DSU, and a DSU bandwidth of 44,210 kbps:

XSR(config)#controller t3 1/2/0
XSR(config-controller)#no channelized
XSR(config-controller)#clock source line
XSR(config-controller)#framing m13
XSR(config-controller)#cablelength 250
XSR(config-controller)#dsu mode 1
XSR(config-controller)#dsu bandwidth 44210

e-bit-reset

This command sets the E‐bit in the E1 frame to zero while the port is in an asynchronous state.

Syntax

e-bit-reset

Syntax of the “no” Form

The no form of this command negates the E‐‐bit reset:

no e-bit-reset

Mode

Controller configuration: 

XSR(config-controller)#

Example

The following example resets the E‐bit on the E1 controller:

XSR(config-controller)#