Avago Technologies LSI53C896 - Manual (Page 99)

PCI Bus Interface Signals 3-11
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
3.2.7 SCSI Function A GPIO Signals
Table 3.8 describes the signals for the SCSI Function A GPIO group.
Table 3.8 SCSI Function A GPIO Signals
Name Bump Type Strength Description
A_GPIO0_
FETCH/ AB16 I/O 8 mA SCSI Function A General Purpose I/O pin 0. This pin
is programmable at power-up through the MAD[7] pin to
serve as the data signal for the serial EEPROM interface.
When GPIO_0 is not in the process of downloading
EEPROM data it can drive a SCSI Activity LED if bit 5 in
the
General Purpose Pin Control (GPCNTL) register is
set. Or, it can indicate that the next bus request is an
opcode fetch if bit 6 in the GPCNTL register is set.
A_GPIO1_
MASTER/ Y16 I/O 8 mA SCSI Function A General Purpose I/O pin 1. This pin is
programmable at power-up through the MAD[7] pin to
serve as the clock signal for the serial EEPROM interface.
When
General Purpose Pin Control (GPCNTL) bit 7 is set,
this pin drives LOW when the LSI53C896 is bus master.
A_GPIO2 AA16 I/O 8 mA SCSI Function A General Purpose I/O pin 2. This pin
powers up as an input.
A_GPIO3 AC17 I/O 8 mA SCSI Function A General Purpose I/O pin 3. This pin
powers up as an input.
A_GPIO4 AB17 I/O 8 mA SCSI Function A General Purpose I/O pin 4. This pin
powers up as an output.