Avago Technologies LSI53C896 - Manual (Page 362)

IX-12 Index
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
20.0 Mbytes (16-bit transfers)
40 MHz Clock 6-64
50 MHz Clock 6-64
second dword 5-14 , 5-22 , 5-24 , 5-33 , 5-36 , 5-40
select 2-20
during selection 2-40
instruction 5-17
with ATN/ 5-21
with SATN/ on a start sequence (WATN) 4-23
selected (SEL) 2-45 , 4-76 , 4-80
selection or reselection time-out (STO) 4-78 , 4-82
selection response logic test (SLT) 4-92
semaphore (SEM) 4-51
serial EEPROM
data format 2-58
interface 2-57
SERR/ 3-9
SERR/ enable (SE) 4-3
set instruction 5-16 , 5-18
set/clear
carry 5-21
SACK/ 5-22
SATN/ 5-22
target mode 5-21
shadow register test mode (SRTM) 4-61
SIDL
least significant byte full (ILF) 4-44
most significant byte full (ILF1) 4-48
signal names
and BGA position 6-68
by BGA position 6-68
signal process (SIGP) 4-51 , 4-56
signaled system error (SSE) 4-5
simple arbitration 4-21
single
address cycles 2-22
ended SCSI signals 6-8
step interrupt (SSI) 4-42 , 4-71
step mode (SSM) 4-73
SIP 2-44 , 2-47 , 2-48
slow memory ( 128 Kbytes)
read cycle 6-54
write cycle 6-56
slow ROM pin 3-23
SLPAR high byte enable (SLPHBEN) 4-28
SLPAR mode (SLPMD) 4-28
SODL
least significant byte full (OLF) 4-44
most significant byte full (OLF1) 4-48
register 2-54
SODR
least significant byte full (ORF) 4-44
most significant byte full (ORF1) 4-48
software reset (SRST) 4-51
source
I/O-memory enable (SIOM) 4-69
special cycle command 2-5
SREQ 2-48
stacked interrupts 2-47
start
address 5-14 , 5-22
DMA operation (STD) 4-74
SCSI transfer (SST) 4-26
sequence (START) 4-22
static block move selector (SBMS) 4-109
STOP command 2-10
stop signal 3-8
STOP/ 3-8
store instruction 2-25
stress ratings 6-2
subsystem ID 2-58
(SID) 4-12
subsystem vendor ID 2-58
(SVID) 4-11
SWIDE register 2-54
SYNC_IRQD (SI) 4-54
synchronous
clock conversion factor (SCF[2:0]) 4-30
data transfer rates 2-40
operation 2-40
SCSI receive 2-34
SCSI send 2-33
system error 3-9
system signals 3-5
T
table indirect 5-6 , 5-20
mode 5-19
table relative 5-21
target
asynchronous receive 6-62
asynchronous send 6-61
mode 5-10 , 5-15
SATN/ active (M/A) 4-79
mode (TRG) 4-24
ready 3-7
synchronous transfer 6-66
timing 6-15
TCK 3-20
TDI 3-20
TDO 3-20
TEMP register 5-37
temporary (TEMP) 4-59
termination 2-38
test clock 3-20