Avago Technologies LSI53C896 - Manual (Page 100)

3-12 Signal Descriptions
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
3.2.8 SCSI Function B GPIO Signals
Table 3.9 describes the signals for the SCSI Function B GPIO group.
Table 3.9 SCSI Function B GPIO Signals
Name Bump Type Strength Description
B_GPIO0_
FETCH/ AA14 I/O 8 mA SCSI Function B General Purpose I/O pin 0. This pin
is programmable at power-up through the MAD[7] pin to
serve as the data signal for the serial EEPROM interface.
When GPIO_0 is not in the process of downloading
EEPROM data, it can drive a SCSI Activity LED if bit 5
in the
General Purpose Pin Control (GPCNTL) register is
set. Or, it can indicate that the next bus request is an
opcode fetch if bit 6 in the GPCNTL register is set.
B_GPIO1_
MASTER/ AC15 I/O 8 mA SCSI Function B General Purpose I/O pin 1. This pin
is programmable at power-up through the MAD[7] pin to
serve as the clock signal for the serial EEPROM
interface. When
General Purpose Pin Control (GPCNTL)
bit 7 is set, this pin is driven LOW when the LSI53C896
is bus master.
B_GPIO2 AB15 I/O 8 mA SCSI Function B General Purpose I/O pin 2. This pin
powers up as an input.
B_GPIO3 AA15 I/O 8 mA SCSI Function B General Purpose I/O pin 3. This pin
powers up as an input.
B_GPIO4 AC16 I/O 8 mA SCSI Function B General Purpose I/O pin 4. This pin
powers up as an output.