Avago Technologies LSI53C896 - Manual (Page 345)

A-5
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
SCSI First Byte Received (SFBR) 0x08 Read/Write 4-38
SCSI Input Data Latch (SIDL) 0x50–0x51 Read Only 4-99
SCSI Interrupt Enable One (SIEN1) 0x41 Read/Write 4-78
SCSI Interrupt Enable Zero (SIEN0) 0x40 Read/Write 4-76
SCSI Interrupt Status One (SIST1) 0x43 Read Only 4-82
SCSI Interrupt Status Zero (SIST0) 0x42 Read Only 4-79
SCSI Longitudinal Parity (SLPAR) 0x44 Read/Write 4-83
SCSI Output Control Latch (SOCL) 0x09 Read/Write 4-39
SCSI Output Data Latch (SODL) 0x54–0x55 Read/Write 4-101
SCSI Selector ID (SSID) 0x0A Read Only 4-40
SCSI Status One (SSTAT1) 0x0E Read Only 4-46
SCSI Status Two (SSTAT2) 0x0F Read Only 4-48
SCSI Status Zero (SSTAT0) 0x0D Read Only 4-44
SCSI Test Four (STEST4) 0x52 Read Only 4-100
SCSI Test One (STEST1) 0x4D Read/Write 4-93
SCSI Test Three (STEST3) 0x4F Read/Write 4-97
SCSI Test Two (STEST2) 0x4E Read/Write 4-95
SCSI Test Zero (STEST0) 0x4C Read Only 4-92
SCSI Timer One (STIME1) 0x49 Read/Write 4-88
SCSI Timer Zero (STIME0) 0x48 Read/Write 4-87
SCSI Transfer (SXFER) 0x05 Read/Write 4-33
SCSI Wide Residue (SWIDE) 0x45 Read/Write 4-84
Static Block Move Selector (SBMS) 0xB0–0xB3 Read/Write 4-109
Temporary (TEMP) 0x1C–0x1F Read/Write 4-59
Updated Address (UA) 0xCC–0xCF Read/Write 4-113
Table A.1 LSI53C896 Register Map (Cont.)
Register Name Address Read/Write Page