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Avago Technologies LSI53C896 User Manual

Page 81

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SCSI Functional Description

2-53

Version 3.3

Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.

2.2.19.1 Wide SCSI Send Bit

The WSS bit is set whenever the SCSI controller is sending data
(Data-Out for the initiator or Data-In for the target) and the controller
detects a partial transfer at the end of a chained Block Move SCRIPTS
instruction (this flag is not set if a normal Block Move instruction is used).
Under this condition, the SCSI controller does not send the low-order
byte of the last partial memory transfer across the SCSI bus. Instead, the
low-order byte is temporarily stored in the lower byte of the

SCSI Output Data Latch (SODL)

register, and the WSS flag is set. The

hardware uses the WSS flag to determine what behavior must occur at
the start of the next data send transfer. When the WSS flag is set at the
start of the next transfer, the first byte (the high-order byte) of the next
data send transfer is “married” with the stored low-order byte in the
SODL register; and the two bytes are sent out across the bus, regardless
of the type of Block Move instruction (normal or chained). The flag is
automatically cleared when the “married” word is sent. The flag is
alternately cleared through SCRIPTS or by the microprocessor. Also, the
microprocessor or SCRIPTS can use this bit for error detection and
recovery purposes.

2.2.19.2 Wide SCSI Receive Bit

The WSR bit is set whenever the SCSI controller is receiving data
(Data-In for the initiator or Data-Out for the target) and the controller
detects a partial transfer at the end of a block move or chained block
move SCRIPTS instruction. When WSR is set, the high-order byte of the
last SCSI bus transfer is not transferred to memory. Instead, the byte is
temporarily stored in the

SCSI Wide Residue (SWIDE)

register. The

hardware uses the WSR bit to determine what behavior must occur at
the start of the next data receive transfer. The bit is automatically cleared
at the start of the next data receive transfer. The bit can alternatively be
cleared by the microprocessor or through SCRIPTS. Also, the
microprocessor or SCRIPTS can use this bit for error detection and
recovery purposes.