6 prefetching scripts instructions, Prefetching scripts instructions – Avago Technologies LSI53C896 User Manual
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Functional Description
Version 3.3
Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
3.
Halt the SCSI clock by setting the Halt SCSI Clock bit
(
register, bit 5).
4.
Set the clock conversion factor using the SCF and CCF fields in the
register.
5.
Set the SCLK Quadrupler Select bit (
, bit 2).
6.
Clear the Halt SCSI Clock bit.
2.2.6 Prefetching SCRIPTS Instructions
When enabled by setting the Prefetch Enable bit (bit 5) in the
register, the prefetch logic in the LSI53C896
fetches 8 Dwords of instruction. The prefetch logic automatically
determines the maximum burst size that it can perform, based on the
burst length as determined by the values in the
register. If the unit cannot perform bursts of at least four Dwords, it
disables itself. While the chip is prefetching SCRIPTS instructions, it uses
PCI cache commands Memory Read Line, and Memory Read Multiple,
if PCI caching is enabled.
Note:
This feature is only useful when fetching SCRIPTS
instructions from main memory. Due to the short access
time of SCRIPTS RAM, prefetching is not necessary when
fetching instructions from this memory.
The LSI53C896 may flush the contents of the prefetch unit under certain
conditions to ensure that the chip always operates from the most current
version of the SCRIPTS instruction. When one of these conditions
applies, the contents of the prefetch unit are automatically flushed.
•
On every Memory Move instruction.
The Memory Move instruction often places modified code directly
into memory. To make sure that the chip executes all recent
modifications, the prefetch unit flushes its contents and loads the
modified code every time an instruction is issued. To avoid
inadvertently flushing the prefetch unit contents, use the No Flush
option for all Memory Move operations that do not modify code within
the next 8 Dwords. For details on this instruction refer to