Avago Technologies LSI53C896 - Manual (Page 127)

PCI Configuration Registers 4-15
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Register: 0x3D
Interrupt Pin
Read Only
IP Interrupt Pin [7:0]
This register is unique to each SCSI function. It tells
which interrupt pin the device uses. Its value is set to
0x01 for the Function A (INTA/) signal, and 0x02 for the
Function B (INTB/) signal at power-up if MAD[4] is pulled
LOW. The Function B value is set to 0x01 (INTA/) if
MAD[4] is pulled HIGH.
Note: Refer to Section 3.7, “MAD Bus Programming,” for
details.
Register: 0x3E
Min_Gnt
Read Only
MG Min_Gnt [7:0]
This register specifies the desired settings for latency
timer values. Min_Gnt specifies how long a burst period
the device needs. The value specified in these registers
is in units of 0.25 microseconds. The LSI53C896 sets this
register to 0x11.
7 0
IP
SCSI Function A
0 0 0 0 0 0 0 1
SCSI Function B if MAD[4] pulled LOW
0 0 0 0 0 0 1 0
SCSI Function B if MAD[4] pulled HIGH
0 0 0 0 0 0 0 1
7 0
MG
0 0 0 1 0 0 0 1