Avago Technologies LSI53C896 - Manual (Page 197)

SCSI Registers 4-85
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Register: 0x46
Chip Type (CTYPE)
Read Only
TYP Chip Type [7:4]
These bits identify the chip type for software purposes.
Note: These bits no longer identify an 8XX device. These bits
have been set to 0xF to indicate that the device should be
uniquely identified by setting the PCI Configuration Enable
bit in the
Chip Test Two (CTEST2) register and using the
PCI Revision ID (Rev ID) and PCI Device ID which are
shadowed in the SCRIPTS Fetch Selector (SFS) register.
Any devices that contain the value 0xF in this register
should use this mechanism to uniquely identify the device.
R Reserved [3:0]
Register: 0x47
General Purpose Pin Control (GPCNTL)
Read/Write
This register determines whether the pins controlled by the
General Purpose (GPREG) are inputs or outputs. Bits [4:0] in GPCNTL
correspond to bits [4:0] in the GPREG register. When the bits are
enabled as inputs, an internal pull-down is also enabled. If either SCSI
function GPCNTL register has a GPIO pin set as an output, the pin is
enabled as an output. If both the SCSI function GPREG registers define
a single GPIO pin as an output, the results are indeterminate.
7 4 3 0
TYP R
1 1 1 1 x x x x
7 6 5 4 2 1 0
ME FE LEDC GPIO GPIO
0 0 0 0 1 1 1 1