Avago Technologies LSI53C896 User Manual
Page 344

A-4
Register Summary
Version 3.3
Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Memory Move Write Selector (MMWS)
Phase Mismatch Jump Address 1 (PMJAD1)
Phase Mismatch Jump Address 2 (PMJAD2)
–
–
–
–
–
Scratch Registers C–R (SCRATCHC–SCRATCHR)
Table A.1
LSI53C896 Register Map (Cont.)
Register Name
Address
Read/Write
Page