Scratch register b (scratchb), Registers: 0x5c–0x5f – Avago Technologies LSI53C896 User Manual
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Registers
Version 3.3
Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Registers: 0x5C–0x5F
Scratch Register B (SCRATCHB)
Read/Write
SCRATCHB
Scratch Register B
[31:0]
This is a general purpose user definable scratch pad
register. Apart from CPU access, only register read/write
and memory moves directed at the SCRATCH register
alters its contents. The power-up values are
indeterminate. A special mode of this register can be
enabled by setting the PCI Configuration Info Enable bit
in the
register. If this bit is set,
the
returns bits [31:13]
of the SCRIPTS RAM PCI
Base Address Register Two (SCRIPTS RAM)
in bits
[31:13] of the SCRATCH B register when read. When
read, bits [12:0] of SCRATCH B always return zeros in
this mode. Writes to the SCRATCH B register are
unaffected. Resetting the PCI Configuration Info Enable
bit causes the SCRATCH B register to return to normal
operation.
Registers: 0x60–0x9F
Scratch Registers C–R (SCRATCHC–SCRATCHR)
Read/Write
These are general purpose user definable scratch pad registers. Apart
from CPU access, only register read/write, memory moves and
Load/Stores directed at a SCRATCH register alters its contents. The
power-up values are indeterminate.
31
0
SCRATCHB
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x