Avago Technologies LSI53C896 - Manual (Page 280)

6-12 Specifications
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Figure 6.8 External Clock
Table 6.14 External Clock
1
1. Timing is for an external 40 MHz clock. A quadrupled 40 MHz clock is required for Ultra2 SCSI
operation.
Symbol Parameter Min Max Unit
t
1
Bus clock cycle time 30 DC ns
SCSI clock cycle time (SCLK)
2
2. This parameter must be met to ensure SCSI timing is within specification.
25 60 ns
t
2
CLK LOW time
3
3. Duty cycle not to exceed 60/40.
10 – ns
SCLK LOW time
3
6 33 ns
t
3
CLK HIGH time
3
12 – ns
SCLK HIGH time
3
10 33 ns
t
4
CLK slew rate 1 – V/ns
SCLK slew rate 1 – V/ns
CLK, SCLK 1.4 V
t
1
t
3
t
4
t
2