Avago Technologies LSI53C896 - Manual (Page 343)

A-3
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Chip Type (CTYPE) 0x46 Read Only 4-85
Cumulative SCSI Byte Count (CSBC) 0xDC–0xDF Read/Write 4-116
Data Structure Address (DSA) 0x10–0x13 Read/Write 4-50
DMA Byte Counter (DBC) 0x24–0x26 Read/Write 4-65
DMA Command (DCMD) 0x27 Read/Write 4-66
DMA Control (DCNTL) 0x3B Read/Write 4-72
DMA FIFO (DFIFO) 0x20 Read/Write 4-60
DMA Interrupt Enable (DIEN) 0x39 Read/Write 4-71
DMA Mode (DMODE) 0x38 Read Only 4-68
DMA Next Address (DNAD) 0x28–0x2B Read/Write 4-66
DMA Next Address 64 (DNAD64) 0xB8–0xBB Read/Write 4-110
DMA SCRIPTS Pointer (DSP) 0x2C–0x2F Read/Write 4-67
DMA SCRIPTS Pointer Save (DSPS) 0x30–0x33 Read/Write 4-67
DMA Status (DSTAT) 0x0C Read Only 4-41
DSA Relative Selector (DRS) 0xAC–0xAF Read/Write 4-109
Dynamic Block Move Selector (DBMS) 0xB4–0xB7 Read/Write 4-110
Entry Storage Address (ESA) 0xD0–0xD3 Read/Write 4-114
General Purpose (GPREG) 0x07 Read/Write 4-37
General Purpose Pin Control (GPCNTL) 0x47 Read/Write 4-85
Instruction Address (IA) 0xD4–0xD7 Read/Write 4-114
Interrupt Status One (ISTAT1) 0x15 Read/Write 4-53
Interrupt Status Zero (ISTAT0) 0x14 Read/Write 4-50
Mailbox One (MBOX1) 0x17 Read/Write 4-55
Mailbox Zero (MBOX0) 0x16 Read/Write 4-54
Memory Move Read Selector (MMRS) 0xA0–0xA3 Read/Write 4-107
Table A.1 LSI53C896 Register Map (Cont.)
Register Name Address Read/Write Page