Avago Technologies LSI53C896 - Manual (Page 251)

Read/Write Instructions 5-23
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
5.4 Read/Write Instructions
The Read/Write instruction supports addition, subtraction, and
comparison of two separate values within the chip. It performs the desired
operation on the specified register and the
SCSI First Byte Received (SFBR) register, then stores the result back to
the specified register or the SFBR. If the COM bit ( DMA Control (DCNTL) ,
bit 0) is cleared, Read/Write instructions cannot be used.
5.4.1 First Dword
Figure 5.7 Read/Write Instruction – First Dword
IT[1:0] Instruction Type – Read/Write Instruction [31:30]
The Read/Write instruction uses operator bits [26:24] in
conjunction with the opcode bits to determine which
instruction is currently selected.
OPC[2:0] Opcode [29:27]
The combinations of these bits determine whether the
instruction is a Read/Write or an I/O instruction. Opcodes
0b000 through 0b100 are considered I/O instructions.
O[2:0] Operator [26:24]
These bits are used in conjunction with the opcode bits
to determine which instruction is currently selected. Refer
to
Table 5.1 on page 5-2 for field definitions.
D8 Use data8/SFBR 23
When this bit is set, SCSI First Byte Received (SFBR) is
used instead of the data8 value during a
Read-Modify-Write instruction (refer to
Table 5.1 for
details). This allows the user to add two register values.
A[6:0] Register Address – A[6:0] [22:16]
It is possible to change register values from SCRIPTS in
read-modify-write cycles or move to/from
SCSI First Byte Received (SFBR) cycles. A[6:0] selects
an 8-bit source/destination register within the LSI53C896.
31 30 29 27 26 24 23 22 16 15 8 7 6 0
DCMD Register DBC Register
IT[1:0] OPC[2:0] O[2:0] D8 A[6:0] ImmD A7 R – Must be 0