Avago Technologies LSI53C896 - Manual (Page 196)

4-84 Registers
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
The longitudinal parity checks are meant to provide an
added measure of SCSI data integrity and are entirely
optional. This register does not latch SCSI
selection/reselection IDs under any circumstances. The
default value of this register is zero.
The longitudinal parity function normally operates as a
byte function. During 16-bit transfers, the high and low
bytes are XORed together and then XORed into the
current longitudinal parity value. By setting the SLPMD bit
in the
SCSI Control Two (SCNTL2) register, the
longitudinal parity function is made to operate as a
word-wide function. During 16-bit transfers, the high byte
of the SCSI bus is XORed with the high byte of the
current longitudinal parity value, and the low byte of the
SCSI bus is XORed with the low byte of the current
longitudinal parity value. In this mode, the 16-bit
longitudinal parity value is accessed a byte at a time
through the
SCSI Longitudinal Parity (SLPAR) register.
Which byte is accessed is controlled by the SLPHBEN bit
in the
SCSI Control Two (SCNTL2) register.
Register: 0x45
SCSI Wide Residue (SWIDE)
Read/Write
SWIDE SCSI Wide Residue [7:0]
After a wide SCSI data receive operation, this register
contains a residual data byte if the last byte received was
never sent across the DMA bus. It represents either the
first data byte of a subsequent data transfer, or it is a
residue byte which should be cleared when an Ignore
Wide Residue message is received. It may also be an
overrun data byte. The power-up value of this register
is indeterminate.
7 0
SWIDE
x x x x x x x x