Avago Technologies LSI53C896 - Manual (Page 244)

5-16 SCSI SCRIPTS Instruction Set
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
arbitration, it fetches the next instruction from the address
pointed to by the
DMA SCRIPTS Pointer (DSP) register.
This way the SCRIPTS can move on to the next
instruction before the reselection completes. It continues
executing SCRIPTS until a SCRIPTS that requires a
response from the initiator is encountered.
If the LSI53C896 is selected or reselected before winning
arbitration, it fetches the next instruction from the address
pointed to by the 32-bit jump address field stored in the
DMA Next Address (DNAD) register. Manually set the
LSI53C896 to the initiator mode if it is reselected, or to
the target mode if it is selected.
Disconnect Instruction
The LSI53C896 disconnects from the SCSI bus by
deasserting all SCSI signal outputs.
Wait Select Instruction
If the LSI53C896 is selected, it fetches the next
instruction from the address pointed to by the
DMA SCRIPTS Pointer (DSP) register.
If reselected, the LSI53C896 fetches the next instruction
from the address pointed to by the 32-bit jump address
field stored in the
DMA Next Address (DNAD) register.
Manually set the LSI53C896 to the initiator mode when it
is reselected.
If the CPU sets the SIGP bit in the
Interrupt Status Zero (ISTAT0) register, the LSI53C896
aborts the Wait Select instruction and fetches the next
instruction from the address pointed to by the 32-bit jump
address field stored in the
DMA Next Address (DNAD)
register.
Set Instruction
When the SACK/ or SATN/ bits are set, the corresponding
bits in the
SCSI Output Control Latch (SOCL) register are
set. Do not set SACK/ or SATN/ except for testing
purposes. When the target bit is set, the corresponding
bit in the
SCSI Control Zero (SCNTL0) register is also
set. When the carry bit is set, the corresponding bit in the
Arithmetic Logic Unit (ALU) is set.
Note: None of the signals are set on the SCSI bus in target mode.