Avago Technologies LSI53C896 - Manual (Page 50)

2-22 Functional Description
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
2.2.3 64-Bit Addressing in SCRIPTS
The LSI53C896 has a 64-bit PCI interface which provides 64-bit address
and data capability in the initiator mode. The chip also can respond to
64-bit addressing in the target mode.
DACs can be generated for all SCRIPTS operations. There are six selector
registers that hold the upper Dword of a 64-bit address. All but one of
these is static and requires manual loading using a CPU access, a
Load/Store instruction, or a memory move instruction. One of the selector
registers is dynamic and is used during 64-bit direct block moves only. All
selectors default to zero, meaning the LSI53C896 powers up in a state
where only Single Address Cycles (SACs) are generated. When any of the
selector registers are written to a nonzero value, DACs are generated.
Direct, table indirect and indirect block moves, Memory-to-Memory Moves,
Load/Stores and jumps are all instructions with 64-bit address capability.
Crossing the 4 Gbyte boundary on any one SCRIPTS operation is not
permitted, and software must ensure that any given SCRIPTS operation
do not cross the 4 Gbyte boundary.
2.2.4 Hardware Control of SCSI Activity LED
The LSI53C896 has the ability to control a LED through the GPIO_0 pin
to indicate that it is connected to the SCSI bus. Formerly this function
was done by a software driver.
When bit 5 (LED_CNTL) in the General Purpose Pin Control (GPCNTL)
register is set and bit 6 (Fetch Enable) in the GPCNTL register is cleared
and the LSI53C896 is not performing an EEPROM autodownload, bit 3
(CON) in the
Interrupt Status Zero (ISTAT0) register is presented at the
GPIO_0 pin.
The Connected (CON) bit in Interrupt Status Zero (ISTAT0) is set anytime
the LSI53C896 is connected to the SCSI bus either as an initiator or a
target. This happens after the LSI53C896 has successfully completed a
selection or when it has successfully responded to a selection or
reselection. It is also set when the LSI53C896 wins arbitration in low
level mode.