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Registers: 0xd8–0xda, Register: 0xdb – Avago Technologies LSI53C896 User Manual

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Phase Mismatch Jump Registers

4-115

Version 3.3

Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.

Registers: 0xD8–0xDA

SCSI Byte Count (SBC)
Read Only

SBC

SCSI Byte Count

[23:0]

This register contains the count of the number of bytes
transferred to or from the SCSI bus during any given
BMOV. This value is used in calculating the information
placed into the

Remaining Byte Count (RBC)

and

Updated Address (UA)

registers and should not need to

be used in normal operations. There are two conditions
in which this byte count does not match the number of
bytes transferred exactly. If a BMOV is executed to
transfer an odd number of bytes across a wide bus, then
the byte count at the end of the BMOV is greater than the
number of bytes sent by one. This also happens in an
odd byte count wide receive case. Also, in the case of a
wide send in which there is a chain byte from a previous
transfer, the count does not reflect the chain byte sent
across the bus during that BMOV. The reason for this is
due to the fact that to determine the correct address to
start fetching data from after a phase mismatch, this byte
cannot be counted for this BMOV as it was part of the
byte count for the previous BMOV.

Register: 0xDB

Reserved

23

0

SBC

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0