Avago Technologies LSI53C896 - Manual (Page 20)

1-2 Introduction
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
to meet the flexibility requirements of SCSI-3 and Ultra2 SCSI standards.
It is designed to implement multithreaded I/O algorithms with a minimum
of processor intervention, solving the protocol overhead problems of
previous intelligent and nonintelligent adapter designs.
Figure 1.1 illustrates a typical LSI53C896 system and Figure 1.2
illustrates a typical LSI53C896 board application.
Figure 1.1 Typical LSI53C896 System Application
Fixed Disk, Optical Disk,
Printer, Tape, and Other
Peripherals
Fixed Disk, Optical Disk,
Printer, Tape, and Other
Peripherals
One PCI Bus Load
PCI Graphic Accelerator
PCI Fast Ethernet
Memory
Controller
Memory
PCI Bus
Interface
Controller
Central
Processing
Unit
(CPU)
Typical PCI Computer
System Architecture
Processor Bus
LSI53C896 PCI
to Wide Ultra2 SCSI
Function A
and
LSI53C896 PCI
to Wide Ultra2 SCSI
Function B
SCSI Bus
SCSI Bus