Avago Technologies LSI53C896 - Manual (Page 314)

6-46 Specifications
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Table 6.33 Normal/Fast Memory (
≥
128 Kbytes) Single Byte Access Read Cycle
Symbol Parameter Min Max Unit
t
11
Address setup to MAS/ HIGH 25 – ns
t
12
Address hold from MAS/ HIGH 15 – ns
t
13
MAS/ pulse width 25 – ns
t
14
MCE/ LOW to data clocked in 160 – ns
t
15
Address valid to data clocked in 205 – ns
t
16
MOE/ LOW to data clocked in 100 – ns
t
17
Data hold from address, MOE/, MCE/ change 0 – ns
t
18
Address out from MOE/, MCE/ HIGH 50 – ns
t
19
Data setup to CLK HIGH 5 – ns