Base address register zero (i/o), Base address register one (memory), Not supported – Avago Technologies LSI53C896 User Manual
Page 121: Register: 0x0f
PCI Configuration Registers
4-9
Version 3.3
Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
Register: 0x0F
Not Supported
Registers: 0x10–0x13
Base Address Register Zero (I/O)
Read/Write
BAR0
Base Address Register Zero – I/O
[31:0]
This base address register maps the operating register
set into I/O space. The LSI53C896 requires 256 bytes of
I/O space for this base address register. It has bit zero
hardwired to one. Bit 1 is reserved and returns a zero on
all reads, and the other bits map the device into I/O
space. For details on the operation of this register, refer
to the PCI 2.1 specification.
Registers: 0x14–0x1B
Base Address Register One (MEMORY)
Read/Write
BAR1
Base Address Register One
[63:0]
This base address register maps SCSI operating
registers into memory space. This device requires
1024 bytes of address space for this base register. This
register has bits [9:0] hardwired to 0b0000000100. The
default value of this register is 0x0000000000000004. For
details on the operation of this register, refer to the PCI
2.1 specification.
31
0
BAR0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
63
32
BAR1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
31
0
BAR1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0