Avago Technologies LSI53C896 - Manual (Page 73)

SCSI Functional Description 2-45
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
interrupts flush neither the DMA nor SCSI FIFOs before generating the
interrupt, so the DFE bit in the DSTAT register should be checked after
any DMA interrupt.
If the DFE bit is cleared, then the FIFOs must be cleared by setting the
Clear DMA FIFO (CLF) and Clear SCSI FIFO (CSF) bits, or flushed by
setting the Flush DMA FIFO (FLF) bit.
SIEN0 and SIEN1 – The SCSI Interrupt Enable Zero (SIEN0) and
SCSI Interrupt Enable One (SIEN1) registers are the interrupt enable
registers for the SCSI interrupts in SCSI Interrupt Status Zero (SIST0)
and SCSI Interrupt Status One (SIST1) .
DIEN – The DMA Interrupt Enable (DIEN) register is the interrupt enable
register for DMA interrupts in DMA Status (DSTAT) .
DMA Control (DCNTL) – When bit 1 in this register is set, the INTA/
(or INTB/) pin is not asserted when an interrupt condition occurs. The
interrupt is not lost or ignored, but is merely masked at the pin. Clearing
this bit when an interrupt is pending immediately causes the INTA/
(or INTB/) pin to assert. As with any register other than ISTAT, this
register cannot be accessed except by a SCRIPTS instruction during
SCRIPTS execution.
2.2.17.3 Fatal vs. Nonfatal Interrupts
A fatal interrupt, as the name implies, always causes the SCRIPTS to
stop running. All nonfatal interrupts become fatal when they are enabled
by setting the appropriate interrupt enable bit. Interrupt masking is
discussed in
Section 2.2.17.4, “Masking.” All DMA interrupts (indicated
by the DIP bit in Interrupt Status Zero (ISTAT0) and one or more bits in
DMA Status (DSTAT) being set) are fatal.
Some SCSI interrupts (indicated by the SIP bit in the
Interrupt Status Zero (ISTAT0) and one or more bits in
SCSI Interrupt Status Zero (SIST0) or SCSI Interrupt Status One (SIST1)
being set) are nonfatal.
When the LSI53C896 is operating in the Initiator mode, only the
Function Complete (CMP), Selected (SEL), Reselected (RSL),
General Purpose Timer Expired (GEN), and Handshake-to-Handshake
Timer Expired (HTH) interrupts are nonfatal.