Avago Technologies LSI53C896 - Manual (Page 86)

2-58 Functional Description
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
2.4.2 No Download Mode
When MAD[7] is pulled up through an external resistor, the automatic
download is disabled and no data is automatically loaded into chip
registers at power-up or hard reset. The
Subsystem ID and
Subsystem Vendor ID registers are read only, according to the PCI
specification, with a default value of 0x1000 and 0x1000, respectively.
2.5 Power Management
The LSI53C896 complies with the PCI Bus Power Management Interface
Specification, Revision 1.1. The PCI Function Power States D0, D1, D2,
and D3 are defined in that specification.
D0 is the maximum powered state, and D3 is the minimum powered
state. Power state D3 is further categorized as D3hot or D3cold. A
function that is powered off is said to be in the D3cold power state. The
Table 2.8 Mode A Serial EEPROM Data Format
Byte Name Description
0xFB SVID(0) Subsystem Vendor ID , LSB. This byte is loaded into the least significant
byte of the Subsystem Vendor ID register in the appropriate PCI
configuration space at chip power-up or hard reset.
0xFC SVID(1) Subsystem Vendor ID , MSB. This byte is loaded into the most significant
byte of the Subsystem Vendor ID register in the appropriate PCI
configuration space at chip power-up or hard reset.
0xFD SID(0) Subsystem ID , LSB. This byte is loaded into the least significant byte of
the Subsystem ID register in the appropriate PCI configuration space at
chip power-up or hard reset.
0xFE SID(1) Subsystem ID , MSB. This byte is loaded into the most significant byte of
the Subsystem ID register in the appropriate PCI configuration space at
chip power-up or hard reset.
0xFF CKSUM Checksum. This 8-bit checksum is formed by adding, bytewise, each byte
contained in locations 0x00–0x03 to the seed value 0x55, and then taking
the twos complement of the result.
0x100–EOM UD User Data.