Avago Technologies LSI53C896 - Manual (Page 262)

5-34 SCSI SCRIPTS Instruction Set
Version 3.3 Copyright © 1998–2003 by LSI Logic Corporation. All rights reserved.
5.6 Memory Move Instructions
For Memory Move instructions, bits 5 and 4 (SIOM and DIOM) in the
DMA Mode (DMODE) register determine whether the source or
destination addresses reside in memory or I/O space. By setting these
bits appropriately, data may be moved within memory space, within I/O
space, or between the two address spaces.
The Memory Move instruction copies the specified number of bytes from
the source address to the destination address.
For memory moves where the data read is from the 64-bit address space,
the upper Dword of the address resides in the
Memory Move Read Selector (MMRS) register. For memory moves where
the data is written to the 64-bit address space, the upper Dword of the
address resides in the
Memory Move Write Selector (MMWS) register.
Allowing the LSI53C896 to perform memory moves frees the system
processor for other tasks and moves data at higher speeds than available
from current DMA controllers. Up to 16 Mbytes may be transferred with
one instruction. There are two restrictions:
•
Both the source and destination addresses must start with the same
address alignment (A[1:0]) must be the same). If the source and
destination are not aligned, then an illegal instruction interrupt
occurs. For the PCI
Cache Line Size register setting to take effect,
the source and destination must be the same distance from a cache
line boundary.
•
Indirect addresses are not allowed. A burst of data is fetched from
the source address, put into the DMA FIFO, and then written out to
the destination address. The move continues until the byte count
decrements to zero, then another SCRIPTS is fetched from
system memory.
The DMA SCRIPTS Pointer Save (DSPS) and
Data Structure Address (DSA) registers are additional holding registers
used during the Memory Move. However, the contents of the
Data Structure Address (DSA) register are preserved.