34 rx fifo read pointer (0x72)-rfrptr, 35 rx fifo write pointer(0x76)-rfwptr, 36 rx fifo last read frame (0x7a)-rflrfptr – Freescale Semiconductor MPC5200B User Manual
Page 551: Rx fifo read pointer (0x72)—rfrptr -35, Rx fifo write pointer(0x76)—rfwptr -35, Rx fifo last read frame (0x7a)—rflrfptr -35, Rx fifo read pointer (0x72) -35, Rx fifo write pointer (0x76) -35, Rx fifo last read frame (0x7a) -35, Rx fifo read pointer (0x72)—rfrptr
MPC5200B Users Guide, Rev. 1
15-40
Freescale Semiconductor
PSC Registers—MBAR + 0x2000, 0x2200, 0x2400, 0x2600, 0x2800, 0x2C00
15.2.34
Rx FIFO Read Pointer (0x72)—RFRPTR
15.2.35
Rx FIFO Write Pointer(0x76)—RFWPTR
15.2.36
Rx FIFO Last Read Frame (0x7A)—RFLRFPTR
Bit
Name
Description
0:3
—
Reserved
4:15
ALARM
“Almost full” threshold level. Amount of empty space remaining in the Rx FIFO at which the
ALARM bit in the status register goes high/active. See
for details.
Table 15-62. Rx FIFO Read Pointer (0x72)
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 lsb
R
Reserved
R_PTR
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:3
—
Reserved
4:15
R_PTR
Read pointer.This FIFO-maintained pointer points to the next FIFO location to be read.
Table 15-63. Rx FIFO Write Pointer (0x76)
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 lsb
R
Reserved
W_PTR
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:3
—
Reserved
4:15
W_PTR
Write pointer.This FIFO-maintained pointer points to the next FIFO location to be written to.
Table 15-64. Rx FIFO Last Read Frame (0x7A)
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 lsb
R
Reserved
LFP
W
RESET
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:3
—
Reserved
4:15
LFP
Last Frame Pointer. Not applicable to PSC FIFOs, since the PSCs do not recognize frame
formats in the serial data stream.