6 tx last word pcitlwr(r) -mbar + 0x3814, 7 tx bytes done counts pcitdcr(r) -mbar + 0x3818 – Freescale Semiconductor MPC5200B User Manual
Page 325
MPC5200B Users Guide, Rev. 1
10-28
Freescale Semiconductor
Registers
10.3.3.1.6
Tx Last Word PCITLWR(R) —MBAR + 0x3814
10.3.3.1.7
Tx Bytes Done Counts PCITDCR(R) —MBAR + 0x3818
10.3.3.1.8
Tx Packets Done Counts PCITPDCR(R) —MBAR + 0x3820
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Last_Word
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Last_Word
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
0:31
Last_Word
This status register indicates the last 32-bit data fetched from the FIFO and is designed for
the case in which an abnormal PCI termination has corrupted the integrity of the FIFO data
(for that word).
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Bytes_Done
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Bytes_Done
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
0:31
Bytes_Done
This status register indicates the number of bytes transmitted since the start of a packet. It
is updated at the end of each successful PCI data beat. For normally terminated packets
the Bytes_Done value and the Packet_Size values will be equal. If Continuous Mode is
active the Bytes_Done value will read zero at the end of a successful packet and the
Packets_Done field will be incremented.
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Packets_Done
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0