Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
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The IEEE 1588-2008 Precision Clock Synchronization Protocol for Networked Measurement and Control
Systems Standard is available on the IEEE website.
Implementing a 1588 System That Includes a LL 40-100GbE IP Core
The 1588 specification in IEEE 1588-2008 Precision Clock Synchronization Protocol for Networked
Measurement and Control Systems Standard describes various systems you can implement in hardware
and software to synchronize clocks in a distributed system by communicating offset and frequency
correction information between master and slave clocks in arbitrarily complex systems. A 1588 system
that includes the LL 40-100GbE IP core with 1588 PTP functionality uses the incoming and outgoing
timestamp information from the IP core and the other modules in the system to synchronize clocks across
the system.
The LL 40-100GbE IP core with 1588 PTP functionality provides the timestamp manipulation and basic
update capabilities required to integrate your IP core in a 1588 system. You can specify that packets are
PTP packets, and how the IP core should update incoming timestamps from the client interface before
transmitting them on the Ethernet link. The IP core does not implement the event messaging layers of the
protocol, but rather provides the basic hardware capabilities that support a system in implementing the
full 1588 protocol.
UG-01172
2015.05.04
Implementing a 1588 System That Includes a LL 40-100GbE IP Core
3-39
Functional Description
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