Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
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Low Latency 40-100GbE IP Core
40-100GbE IP Core v14.0
Maximum Ethernet frame size
Programmable maximum received
frame size controls effect on the
statistics increment vectors and
statistics counters.
Programmable maximum
received frame size controls
oversized frame rejection and
effect on the statistics increment
vectors and statistics
counters.Default maximum size
is different for cut-through and
store-and-forward modes.
Link fault signaling
Link fault signaling turned on or off
in parameter editor. If link fault
signaling is turned off, the relevant
signals are not available.
If turned on, the IP core has a
configurable option for IEEE 802.3 –
2012 Ethernet Standard Clause 66
support.
The response in case of remote or
local fault is determined by whether
or not you turn on Clause 66
support.
Available. Programmable
options to specify response to
remote or local fault.
IEEE 802.3 –2012 Ethernet
Standard Clause 66 support is
not available.
TX FCS (CRC-32) insertion
Configurable in parameter editor.
Programmable in IP core
registers.
Deficit idle counter
(maintenance of minimum
average 12-byte IPG)
Configurable in parameter editor.
You can specify a minimum average
IPG of 8 bytes or 12 bytes.
Always included.
More precise IPG control.
Available if you include the deficit
idle counter.
Programmable in IP core
registers.
RX FCS error flag alignment
with EOP
Configurable in parameter editor. If
alignment parameter is turned on,
the RX FCS error flag is asserted in
the same clock cycle with the EOP
signal. If the parameter is turned off,
the FCS error signal might be
asserted in a later clock cycle.
If IP core detects an FCS error,
RX FCS error flag is asserted in
same clock cycle with the EOP
signal, unless the IP core is in RX
automatic pad removal mode. In
RX automatic pad removal
mode, the IP core might assert
the two signals on different clock
cycles.
RX automatic pad removal
Not available.
Programmable in IP core
registers.
IEEE-1588 (PTP) support
Configurable in parameter editor.
Not available.
UG-01172
2015.05.04
Differences Between Low Latency 40-100GbE IP Core and 40-100GbE IP Core v15.0
C-3
Differences Between Low Latency 40-100GbE IP Core and 40-100GbE IP Core v15.0
Altera Corporation