Rx crc forwarding, Inter-packet gap, Pause ignore – Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
Page 63
character when it expects a terminate character. The Low Latency 40-100GbE IP core detects and handles
the following forms of malformed packets:
• If the IP core detects an Error character, it generates an EOP, asserts a malformed packet error
(
rx_error[0]
or
l
), and asserts an FCS error (
rx_fcs_error
(
l
)
and
rx_error[1]
(
l
). If the IP core subsequently detects a terminate character, it
does not generate another EOP indication.
• If the IP core detects any other control character when it is waiting for an EOP indication (terminate
character), the IP core generates an EOP indication (for example, an IDLE or Start character), asserts a
malformed packet error (
rx_error[0]
or
l
), and asserts an FCS error
(
rx_fcs_error
(
l
) and
rx_error[1]
(
l
). If the IP core
subsequently detects a terminate character, it does not generate another EOP indication.
The IP core ignores a Start control character it receives on any lane other than Lane 0.
When the IP core receives a packet that contains an error deliberately introduced on the Ethernet link
using the LL 40-100GbE TX error insertion feature, the IP core identifies it as a malformed packet.
Related Information
Error Insertion Test and Debug Feature
RX CRC Forwarding
The CRC-32 field is forwarded to the client interface after the final byte of data, if the CRC removal
option is not enabled.
Related Information
40-100GbE IP Core FCS (CRC-32) Removal
on page 3-17
Inter-Packet Gap
The MAC RX removes all IPG octets received, and does not forward them to the Avalon-ST client
interface. If you configure your IP core with a custom streaming client interface, the MAC RX does not
remove IPG octets. The MAC RX fowards all received IPG octets to the custom client interface.
Pause Ignore
If you turn on flow control by setting Flow control mode to the value of Standard flow control or
Priority-based flow control in the Low Latency 40-100GbE parameter editor, the IP core processes
incoming pause frames by default. However, when the pause frame receive enable bit (for standard flow
control) or bits (for priority-based flow control) is or are not set, the IP core does not process incoming
pause frames. In this case, the MAC TX traffic is not affected by the valid pause frames.
If you turn off flow control by setting Flow control mode to the value of No flow control in the LL
40-100GbE parameter editor, the IP core does not process incoming pause frames.
Related Information
•
Congestion and Flow Control Using Pause Frames
•
Pause Control and Generation Interface
on page 3-30
•
3-18
RX CRC Forwarding
UG-01172
2015.05.04
Altera Corporation
Functional Description