Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Function - Manual (Page 133)

Addr Name Bit Description HW Reset
Value
Access
0x608
RETRANSMIT_
XOFF_
HOLDOFF_
QUANTA
[15:0] Specifies hold-off time from XOFF pause
frame transmission until retransmission, if
retransmission hold-off functionality is
enabled and pause request remains at the
value of 1. If your IP core implements
priority-based flow control with multiple
priority queues, this register provides access
to an internal table of retransmit-hold-off
times, one for each priority queue. Accesses
are indexed by the value in the
TX_PAUSE_
QNUMBER
register.
Unit is quanta. One quanta is 512 bit times,
which varies according to the datapath width
(256 or 512 depending on the IP core
variation) and the
clk_txmac
frequency.
Note that in the case of 100GbE IP cores, one
quanta is effectively one
clk_txmac
clock
cycle.
Pause request can be either of the
TX_PAUSE_
REQUEST
register pause request bit and the
pause_insert_tx
signal.
0xFFFF RW
0x609
TX_PAUSE_
QUANTA
[15:0] Specifies the pause time to be included in
XOFF frames.
If your IP core implements priority-based
flow control with multiple priority queues,
this register provides access to an internal
table of pause times, one for each priority
queue. Accesses are indexed by the value in
the
TX_PAUSE_QNUMBER
register.
Unit is quanta. One quanta is 512 bit times,
which varies according to the datapath width
(256 or 512 depending on the IP core
variation) and the
clk_txmac
frequency. In
100GbE IP cores, a quanta is effectively a
single
clk_txmac
clock cycle.
0xFFFF RW
3-88 Pause Registers
UG-01172
2015.05.04
Altera Corporation Functional Description
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