Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Function - Manual (Page 169)

Word Addr Bit R/W Name Description
0x4C9 15:0 RO
LP Next page low
The AN RX state machine receives these bits from
the link partner. The following bits are defined:
• [15]: Next page bit
• [14]: ACK which is controlled by the state
machine
• [13]: MP bit
• [12] ACK2 bit
• [11] Toggle bit
For more information, refer to Clause 73.7.7.1
Next Page encodings of IEEE 802.3ap-2007.
0x4CA 31:0 RO
LP Next page high
The AN RX state machine receives these bits from
the link partner. Bits [31:0] correspond to page bits
[47:16]
0x4CB
24:0 RO
AN LP ADV Tech_
A[24:0]
Received technology ability field bits of Clause 73
Auto Negotiation. The 10GBASE-KR PHY
supports A0 and A2. The following protocols are
defined:
• A0 1000BASE-KX
• A1 10GBASE-KX4
• A2 10GBASE-KR
• A3 40GBASE-KR4
• A4 40GBASE-CR4
• A5 100GBASE-CR10
• A24:6 are reserved
For more information, refer to Clause 73.6.4 and
AN LP base page ability registers (7.19-7.21) of
Clause 45 of IEEE 802.3ap-2007.
26:25 RO
AN LP ADV FEC_
F[1:0]
Received FEC ability bits FEC (F0:F1) is encoded
in bits D46:D47 of the base Link Codeword. F0 is
FEC ability. F1 is FEC requested. See Clause 73.6.5
of IEEE 802.3ap-2007 for details.
27 RO
AN LP ADV Remote
Fault
Received Remote Fault (RF) ability bits. RF is
encoded in bit D13 of the base link codeword in
Clause 73 AN. For more information, refer to
Clause 73.6.7 of IEEE 802.3ap
-
2007.
30:28 RO
AN LP ADV Pause
Ability_C[2:0]
Received pause ability bits. Pause (C0:C1) is
encoded in bits D11:D10 of the base link codeword
in Clause 73 AN as follows:
• C0 is the same as PAUSE as defined in Annex
28B
• C1 is the same as ASM_DIR as defined in
Annex 28B
• C2 is reserved
B-10 10GBASE-KR PHY Register Definitions
UG-01172
2015.05.04
Altera Corporation Arria 10 10GBASE-KR Registers
Send Feedback