Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Function - Manual (Page 145)

Address Name- Description Access
0x916
CNTR_RX_64B_LO
Number of 64-byte received frames (lower 32 bits),
including the CRC field but excluding the preamble and
SFD bytes
RO
0x917
CNTR_RX_64B_HI
Number of 64-byte received frames (upper 32 bits),
including the CRC field but excluding the preamble and
SFD bytes
RO
0x918
CNTR_RX_
65to127B_LO
Number of received frames between 65–127 bytes (lower
32 bits)
RO
0x919
CNTR_RX_
65to127B_HI
Number of received frames between 65–127 bytes (upper
32 bits)
RO
0x91A
CNTR_RX_
128to255B_LO
Number of received frames between 128 –255 bytes (lower
32 bits)
RO
0x91B
CNTR_RX_
128to255B_HI
Number of received frames between 128 –255 bytes (upper
32 bits)
RO
0x91C
CNTR_RX_
256to511B_LO
Number of received frames between 256 –511 bytes (lower
32 bits)
RO
0x91D
CNTR_RX_
256to511B_HI
Number of received frames between 256 –511 bytes (upper
32 bits)
RO
0x91E
CNTR_RX_
512to1023B_LO
Number of received frames between 512–1023 bytes (lower
32 bits)
RO
0x91F
CNTR_RX_
512to1023B_HI
Number of received frames between 512 –1023 bytes
(upper 32 bits)
RO
0x920
CNTR_RX_
1024to1518B_LO
Number of received frames between 1024–1518 bytes
(lower 32 bits)
RO
0x921
CNTR_RX_
1024to1518B_HI
Number of received frames between 1024–1518 bytes
(upper 32 bits)
RO
0x922
CNTR_RX_
1519toMAXB_LO
Number of received frames between 1519 bytes and the
maximum size defined in the
MAX_RX_SIZE_CONFIG
register (lower 32 bits)
RO
0x923
CNTR_RX_
1519toMAXB_HI
Number of received frames between 1519 bytes and the
maximum size defined in the
MAX_RX_SIZE_CONFIG
register (upper 32 bits)
RO
3-100 RX Statistics Registers
UG-01172
2015.05.04
Altera Corporation Functional Description
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