Altera IP Compiler for PCI Express - Manual (Page 64)

4–6 Chapter 4: IP Core Architecture
Application Interfaces
IP Compiler for PCI Express User Guide August 2014 Altera Corporation
RX Datapath
The RX datapath transports data from the transaction layer to the Avalon-ST interface.
A FIFO buffers the RX data from the transaction layer until the streaming interface
accepts it. The adapter autonomously acknowledges all packets it receives from the
PCI Express IP core. The rx_abort and rx_retry signals of the transaction layer
interface are not used. Masking of non-posted requests is partially supported. Refer to
the description of the rx_st_mask signal for further information about masking.
TX Datapath
The TX datapath transports data from the application's Avalon-ST interface to the
transaction layer. In the hard IP implementation, a FIFO buffers the Avalon-ST data
until the transaction layer accepts it.
If required, TLP ordering should be implemented by the application layer. The TX
datapath provides a TX credit (tx_cred) vector which reflects the number of credits
available. For non–posted requests, this vector accounts for credits pending in the
Avalon-ST adapter. For example, if the tx_cred value is 5, the application layer has 5
credits available to it. For completions and posted requests, the tx_cred vector reflects
the credits available in the transaction layer of the IP Compiler for PCI Express. For
example, for completions and posted requests, if tx_cred is 5, the actual number of
credits available to the application is (5 – ). You
must account for completion and posted credits which may be pending in the
Avalon-ST adapter. You can use the read and write FIFO pointers and the FIFO empty
flag to track packets as they are popped from the adaptor FIFO and transferred to the
transaction layer.
TLP Reordering
Applications that use the non-posted tx_cred signal must ensure they never send
more packets than tx_cred allows. While the IP core always obeys PCI Express flow
control rules, the behavior of the tx_cred signal itself is unspecified if the credit limit
is violated. When evaluating tx_cred, the application must take into account TLPs
that are in flight, and not yet reflected in tx_cred. Altera recommends your
application implement the following procedure, beginning from a state in which the
application has not yet issued any TLPs:
1. For calibration, ensure this application has issued no TLPs.
2. Wait for tx_cred to indicate that credits are available.
3. Send as many TLPs as are allowed by tx_cred. For example, if tx_cred indicates 3
credits of non-posted headers are available, the application sends 3 non-posted
TLPs, then stops.
In this step, the application exhausts tx_cred before waiting for more credits to
free. This step is required.
4. Wait for the TLPs to cross the Avalon-ST TX interface.
5. Wait at least 3 more clock cycles for tx_cred to reflect the consumed credits.
6. Repeat from Step 2 .