Altera IP Compiler for PCI Express User Manual
Page 160

6–12
Chapter 6: Register Descriptions
Comprehensive Correspondence between Config Space Registers and PCIe Spec Rev 2.0
IP Compiler for PCI Express User Guide
August 2014
Altera Corporation
The PCI Express-to-Avalon-MM mailbox registers are read-only at the addresses
shown in
. The Avalon-MM processor reads these registers when the
corresponding bit in the Avalon-MM interrupt status register is set to 1.
Comprehensive Correspondence between Config Space Registers and
PCIe Spec Rev 2.0
provides a comprehensive correspondence between the configuration
space registers and their descriptions in the
0x3A08
A2P _MAILBOX2
RW
Avalon-MM-to-PCI Express mailbox 2
0x3A0C
A2P _MAILBOX3
RW
Avalon-MM-to-PCI Express mailbox 3
0x3A10
A2P _MAILBOX4
RW
Avalon-MM-to-PCI Express mailbox 4
0x3A14
A2P _MAILBOX5
RW
Avalon-MM-to-PCI Express mailbox 5
0x3A18
A2P _MAILBOX6
RW
Avalon-MM-to-PCI Express mailbox 6
0x3A1C
A2P_MAILBOX7
RW
Avalon-MM-to-PCI Express mailbox 7
Table 6–21. Avalon-MM-to-PCI Express Mailbox Registers, Read/Write (Part 2 of 2)
Address Range: 0x3A00-0x3A1F
Address
Name
Access
Description
Table 6–22. PCI Express-to-Avalon-MM Mailbox Registers, Read-Only
Address Range: 0x3800-0x3B1F
Address
Name
Access
Mode
Description
0x3B00
P2A_MAILBOX0
RO
PCI Express-to-Avalon-MM mailbox 0.
0x3B04
P2A_MAILBOX1
RO
PCI Express-to-Avalon-MM mailbox 1
0x3B08
P2A_MAILBOX2
RO
PCI Express-to-Avalon-MM mailbox 2
0x3B0C
P2A_MAILBOX3
RO
PCI Express-to-Avalon-MM mailbox 3
0x3B10
P2A_MAILBOX4
RO
PCI Express-to-Avalon-MM mailbox 4
0x3B14
P2A_MAILBOX5
RO
PCI Express-to-Avalon-MM mailbox 5
0x3B18
P2A_MAILBOX6
RO
PCI Express-to-Avalon-MM mailbox 6
0x3B1C
P2A_MAILBOX7
RO
PCI Express-to-Avalon-MM mailbox 7
Table 6–23. Correspondence Configuration Space Registers and PCIe Base Specification Rev. 2.0 Description (Part 1
of 5)
Byte Address
Config Reg Offset 31:24 23:16 15:8 7:0
Corresponding Section in PCIe Specification
Common Configuration Space Header
0x000:0x03C
PCI Header Type 0 configuration registers
Type 0 Configuration Space Header
0x000:0x03C
PCI Header Type 1 configuration registers
Type 1 Configuration Space Header
0x040:0x04C
Reserved
0x050:0x05C
MSI capability structure
MSI and MSI-X Capability Structures
0x068:0x070
MSI capability structure
MSI and MSI-X Capability Structures
0x070:0x074 Reserved
0x078:0x07C
Power management capability structure
PCI Power Management Capability Structure
0x080:0x0B8
PCI Express capability structure
PCI Express Capability Structure
0x080:0x0B8
PCI Express capability structure
PCI Express Capability Structure