Altera IP Compiler for PCI Express - Manual (Page 355)

August 2014 Altera Corporation IP Compiler for PCI Express User Guide
C. Performance and Resource Utilization
Soft IP Implementation
This appendix shows the resource utilization for the soft IP implementation of the IP
Compiler for PCI Express. This appendix includes performance and resource
utilization numbers for the following application interfaces:
■ Avalon-ST Interface
■ Avalon-MM Interface
■ Descriptor/Data Interface
f Refer to Performance and Resource Utilization in Chapter 1, Datasheet for
performance and resource utilization of the hard IP implementation.
Avalon-ST Interface
This section provides performance and resource utilization for the soft IP
implementation of the following device families:
■ Arria GX Devices
■ Arria II GX Devices
■ Stratix II GX Devices
■ Stratix III Family
■ Stratix IV Family
Arria GX Devices
Table C–1 shows the typical expected performance and resource utilization of
Arria GX (EP1AGX60DF780C6) devices for different parameters with a maximum
payload of 256 bytes using the Quartus II software, version 11.0.
Table C–1. Performance and Resource Utilization, Avalon-ST Interface–Arria GX Devices
(Note 1)
Parameters Size
×1/ ×4
Internal
Clock (MHz)
Virtual
Channel
Combinational
ALUTs
Logic
Registers
Memory Blocks
M512 M4K
×1 125 1 5900 4100 2 13
×1 125 2 7400 5300 3 17
×4 125 1 7400 5100 6 17
×4 125 2 9000 6200 7 25
Note to Table C–1 :
(1) This configuration only supports Gen1.
August 2014