Altera IP Compiler for PCI Express - Manual (Page 24)

2–8 Chapter 2: Getting Started
Parameterizing the IP Compiler for PCI Express
IP Compiler for PCI Express User Guide August 2014 Altera Corporation
5. Specify the following settings for the Capabilities parameters.
Subsystem vendor ID 0x5BDE
Class code 0xFF0000
Table 2–5. Capabilities Parameters
Parameter Value
Device Capabilities
Tags supported 32
Implement completion timeout disable Turn this option On
Completion timeout range ABCD
Error Reporting
Implement advanced error reporting Off
Implement ECRC check Off
Implement ECRC generation Off
Implement ECRC forwarding Off
MSI Capabilities
MSI messages requested 4
MSI message 64–bit address capable On
Link Capabilities
Link common clock On
Data link layer active reporting Off
Surprise down reporting Off
Link port number 0x01
Slot Capabilities
Enable slot capability Off
Slot capability register 0x0000000
MSI-X Capabilities
Implement MSI-X Off
Table size 0x000
Offset 0x00000000
BAR indicator (BIR) 0
Pending Bit Array (PBA)
Offset 0x00000000
BAR Indicator 0
Table 2–4. PCI Registers (Part 2 of 2)
PCI Base Registers (Type 0 Configuration Space)